Anyone can set up an X account and voice their thoughts, but not every opinion deserves attention. When John Carmack tweets, people usually pay attention. His latest musings rely on a lengthy fiber loop as a kind of L2 cache to store AI model weights with near-zero latency and massive bandwidth.
Carmack arrived at the idea after realizing that single-mode fiber speeds have hit 256 Tb/s across a distance of 200 km. Using rough calculations based on the Doom box, he determined that 32 GB of data reside within the fiber cable at any given moment.
256 Tb/s data rates over a 200 km distance have been shown on single-mode fiber optic, equating to 32 GB of data in transit, “stored” within the fiber, with a 32 TB/s bandwidth. Neural network inference and training may exhibit deterministic weight reference patterns, making it…February 6, 2026
The conversation generated a large volume of responses, several from individuals in high-ranking positions. Several noted that the idea itself resembles delay-line memory, evoking the mid-century era when mercury served as a medium and soundwaves functioned as data. Mercury's unpredictability made it difficult to handle, but Alan Turing himself suggested using a gin blend as a medium.
The primary real-world advantage of using a fiber line lies in energy savings, since maintaining DRAM requires considerable power, while handling light demands minimal energy. Moreover, light is consistent and straightforward to handle. Carmack observes that "fiber transmission may have a better growth trajectory than DRAM," but even setting aside basic logistics, 200 km of fiber would still likely be quite expensive.
Some observers noted additional constraints beyond the fact that Carmack's proposal would demand substantial fiber. Optical amplifiers and DSPs might offset some energy gains, and DRAM costs will need to fall eventually anyway. Some, including Elon Musk, even proposed vacuum as the medium (space lasers!), though the feasibility of such a design would be questionable.
Carmack’s tweet hinted at a more practical method of connecting existing flash memory chips directly to the accelerators, carefully accounting for timing. That would naturally call for a standardized interface agreed upon by flash and AI accelerator manufacturers, but given the massive investment in AI, that possibility doesn’t seem unrealistic at all.
Several groups of scientists have indeed examined variations of that concept, including Behemoth from 2021, FlashGNN and FlashNeuron from 2021, and more recently, the Augmented Memory Grid. It’s easy to picture one or more of these being implemented, assuming they haven’t been already.
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