Intel keeps socket LGA 1700 alive with new P-core-only CPUs — 'Bartlett Lake' is official, but targets embedded applications with up to 12 cores

Intel has finally introduced its long-rumored Bartlett Lake CPUs, which use a P-core-only design with up to 12 cores and are compatible with the LGA 1700 socket used on 12th- to 14th-Gen Intel chips. Contrary to speculation, however, these aren’t value-packed chips vying to earn a spot among the best CPUs for gaming. Rather, they’re commercial chips targeting embedded and edge applications.

In total, Intel is introducing 11 new SKUs, though they’re all slight variations of three different designs. There’s a 12-, 10-, and 8-core design, with slightly different clock speeds depending on the TDP. Intel is offering the chips at 125W, 65W, and 45W. At the 65W and 45W levels, there’s an additional Core 5 SKU that shaves 200MHz off the maximum boost clock and base clock of the main Core 5 offering.

The rationale for a P-core-only design is presumably the latency-sensitive applications in embedded systems and at the edge. Intel has stuck with hybrid core architectures in its consumer releases since 12th-Gen Alder Lake CPUs, but a heterogeneous architecture introduces additional complexity with scheduling tasks on the proper threads. With only performance cores, that complexity is eliminated.

Further supporting mission-critical deployments, Bartlett Lake chips come with LTSC (Long-Term Servicing Contract) support for Windows, as well as Intel TCC (Time Coordinated Computing) and TSN (Time-Sensitive Networking) support. As with most embedded chips, the focus is on stability and consistency, hence the several variations at different TDPs and stiff all-core boost clocks.

The chips are built on Intel 7 (10nm class) and use the Raptor Cove microarchitecture that we saw with Raptor Lake consumer chips. Elsewhere, the chips are familiar. You get up to 16 PCIe 5 lanes from the CPU, plus an additional four PCIe 4 lanes. The PCH provides up to an additional 12 PCIe 4 lanes and 16 PCIe 3 lanes. There are also up to eight lanes of Intel’s Direct Media Interface 4 (DMI 4), which was first introduced with 600-series chipsets.

On the memory front, Intel officially supports up to 5,600 MT/s DDR5, and up to 192GB in capacity with ECC support.

For performance, Intel claims the Core 9 273PE — 12 cores and 65W TDP — offers up to 4.4x lower max PCIe latency, 2.5x more deterministic response time, and 3.8x better deterministic performance compared to the Ryzen 7 9700X, which is also available in an embedded version. Unfortunately, Intel has yet to publish the benchmarks it ran for these claims in its performance index, so it’s hard to put much weight behind them.

As for broader performance comparisons, Intel didn’t share any benchmarks. Once again, these are embedded chips highly focused on reliability and deterministic behavior, not peak performance.

Because Bartlett Lake isn’t heading to retail, Intel hasn’t released any pricing information, nor a strict release date. Those details are going to be subject to Intel’s individual deals with different companies. Intel tells 3DTested that there’s no plan for a consumer release in the future. If we ever see how Bartlett Lake performs in a consumer system, it’ll likely be through gray market channels.

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In addition to Bartlett Lake, Intel highlighted its edge deployments for Core Ultra Series 3, previously known as Panther Lake. Compared to Nvidia’s Jetson AGX Orin 64GB for robotics, Intel claims up to 1.7x higher performance in image classification, 1.9x lower LLM latency, and 4.5x higher throughput for vision action models. Intel also claims savings in TCO (Total Cost of Ownership) compared to dual-systems in robotics, estimating up to $5,549 in savings with a single Panther Lake SoC compared to discrete accelerators like the Jetson AGX Orin and Jetson Thor.

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